While Bitonic and Odd-Even Merge produce correct sorting networks, they don't minimize the number of comparators. Bert Dobbelaere maintains a comprehensive database of the best-known sorting networks, many of which are provably optimal. For FPGA implementations, fewer comparators means less area and potentially lower latency.
Comparator Savings vs Bitonic Sort
| Size | Optimal Comparators | Bitonic Comparators | Savings |
|---|---|---|---|
| 4 | 5 | 6 | 17% |
| 6 | 12 | 15 | 20% |
| 8 | 19 | 24 | 21% |
| 16 | 60 | 80 | 25% |